patch-2.4.4 linux/arch/mips/kernel/r4k_switch.S

• Lines: 52
• Date: Fri Apr 13 20:26:07 2001
• Orig file: v2.4.3/linux/arch/mips/kernel/r4k_switch.S
• Orig date: Sat May 13 08:29:14 2000

diff -u --recursive --new-file v2.4.3/linux/arch/mips/kernel/r4k_switch.S linux/arch/mips/kernel/r4k_switch.S
@@ -9,6 +9,14 @@
  * Copyright (C) 1994, 1995, 1996, by Andreas Busse
  * Copyright (C) 1999 Silicon Graphics, Inc.
  */
+/**************************************************************************
+ *  13 Nov, 2000.
+ *  Made support for MIPS32 CPUs and restoring of fp registers.
+ *
+ *  Carsten Langgaard, carstenl@mips.com
+ *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
+ *************************************************************************/
+	
 #include <asm/asm.h>
 #include <asm/bootinfo.h>
 #include <asm/cachectl.h>
@@ -24,8 +32,6 @@
 
 #include <asm/asmmacro.h>
 
-	.set	mips3
-
 /*
  * task_struct *r4xx0_resume(task_struct *prev, task_struct *next)
  */
@@ -95,6 +101,14 @@
 	END(save_fp)
 
 /*
+ * Restore a thread's fp context.
+ */
+LEAF(restore_fp)
+	FPU_RESTORE_DOUBLE(a0, t1)		# clobbers t1
+	jr	ra
+	END(restore_fp)
+
+/*
  * Load the FPU with signalling NANS.  This bit pattern we're using has
  * the property that no matter whether considered as single or as double
  * precision represents signaling NANS.
@@ -105,6 +119,7 @@
 #define FPU_DEFAULT  0x00000000
 
 LEAF(init_fpu)
+	.set	mips3
 	mfc0	t0, CP0_STATUS
 	li	t1, 0x20000000
 	or	t0, t1
@@ -135,3 +150,4 @@
 	 dmtc1	t0, $f30
 	.set	reorder
 	END(init_fpu)
+